1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a semiconductor device and a method for fabricating the same minimizing the size of a product after a packaging process.
2. Discussion of the Related Art
Generally, a method for fabricating a semiconductor device includes a fabrication process for forming a plurality of chips. A conventional process typically includes forming each chip with a circuit device by forming a minute pattern on a silicon wafer, a packaging process for providing electricity to individual chips of the silicon wafer, and sawing and packaging the individual chips.
In the fabrication process for the semiconductor device, after the circuit device designed with various metals is formed on the silicon wafer, a nitride layer or an oxide layer is coated thereon so as to protect the chips. The nitride or oxide layer protects the wafer from external pollution sources and prevents the metals from corroding. However, it is necessary to expose an electrode pad for connection with an external power source. In this case, the nitride layer or the oxide layer is partially removed by photolithography, thereby exposing the electrode pad.
In the packaging process for the semiconductor device, the semiconductor chip is supported by a lead frame. The chip is mounted on an external substrate such as a printed circuit board PCB, whereby the semiconductor chip is connected with the external substrate.
At this time, the electric connection for providing the power to the electrode pad of the semiconductor chip is classified into various methods. Among the various methods, a wire bonding method is most widely used, in which the electrode pad of the semiconductor chip is connected with the lead frame by a fine metal wire.
A method for fabricating the related art semiconductor device will be described with reference to FIG. 1A to FIG. 1E.
First, as shown in FIG. 1A, after structures 2, including various circuit devices and metal wires electrically connecting the various circuits to one another, are formed on a semiconductor substrate 1, an electrode pad 3 is formed. A nitride layer 4 is coated thereon. The nitride layer 4 serves as a protective layer.
As shown in FIG. 1B, a photoresist pattern 5 is formed on the nitride layer 4. As shown in FIG. 1C, by etching the exposed nitride layer 4 using the photoresist pattern 5 as a mask, the electrode pattern 3 is exposed. The photoresist pattern 5 is removed.
After back-grinding the semiconductor substrate 1 a distance t1, as shown in FIG. 1D, the electrode pad 3 is connected with a lead frame by a wire 6 as shown in FIG. 1E.
In the aforementioned method, the process for exposing the electrode pad to the external power source is very complicated. Also, when exposing the electrode pad, the electrode pad may be corroded due to chemicals, which may cause a problem in the wire bonding process. In addition, the electrode pad may be easily contaminated by external pollution sources.
Further, when performing the wire bonding process, the lead frame is twice or more as large as the semiconductor chip. In this respect, it is inevitably required to fabricate the small-sized product.